Modern memory devices such as dynamic random access memories (DRAMs) are often implemented with CMOS transistors. A common arrangement for one of these memory devices is to use NMOS transistors for memory cells in a memory array of the memory device and to use PMOS transistors for support circuitry in the periphery of the memory array.
It is well known that the magnitude of the threshold voltages V.sub.t of PMOS transistors can decrease by approximately 4 mV for every 1.degree. C. rise in the operating temperature of the transistors. Thus, for example, the magnitude of the threshold voltage V.sub.t of a PMOS transistor used in a DRAM can decrease by approximately 0.28 V within a typical operating range of 0.degree. C. to 70.degree. C. It is also well known that PMOS transistors have sub-threshold currents I.sub.Dst which rise exponentially during operation as the magnitude of a gate-source voltage V.sub.GS rises toward the threshold voltage V.sub.t. Thus, the sub-threshold current I.sub.Dst of a PMOS transistor can be larger at, for example, 70.degree. C. than it is at 0.degree. C. with the same gate-source voltage V.sub.GS being applied at 70.degree. C. and at 0.degree. C. because the magnitude of the threshold voltage V.sub.t is greater at 70.degree. C. than it is at 0.degree. C. As a result, since DRAM memory devices are characterized in a stand-by mode by a stand-by current which includes the sub-threshold currents I.sub.Dst, DRAM memory devices using PMOS transistors can have an acceptable stand-by current at, for example, 0.degree. C. and an excessive stand-by current at, for example, 70.degree. C.
This problem of excessive stand-by current at higher temperatures is exacerbated by modern methods for improving the speed of PMOS transistors. One method involves shortening the length of the channel in order to decrease the gate capacitance to increase switching speed. Another method involves adding more boron to the channel and decreasing the arsenic in the wells in order to lower their junction capacitances and increase their switching speed. Unfortunately, both of these methods also decrease the magnitude of the threshold voltage V.sub.t of PMOS transistors and thereby increase their sub-threshold currents I.sub.Dst.
Therefore, there is a need in the art for a memory device which has a relatively constant stand-by current despite temperature variations.